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Searched refs:IPU_CONF (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/ipu-v3/
H A Dipu-common.c386 val = ipu_cm_read(ipu, IPU_CONF); in ipu_module_enable()
388 ipu_cm_write(ipu, val, IPU_CONF); in ipu_module_enable()
403 val = ipu_cm_read(ipu, IPU_CONF); in ipu_module_disable()
405 ipu_cm_write(ipu, val, IPU_CONF); in ipu_module_disable()
640 val = ipu_cm_read(ipu, IPU_CONF); in ipu_set_csi_src_mux()
645 ipu_cm_write(ipu, val, IPU_CONF); in ipu_set_csi_src_mux()
661 val = ipu_cm_read(ipu, IPU_CONF); in ipu_set_ic_src_mux()
672 ipu_cm_write(ipu, val, IPU_CONF); in ipu_set_ic_src_mux()
1273 ipu_cm_read(ipu, IPU_CONF)); in ipu_dump()
H A Dipu-prv.h33 #define IPU_CONF IPU_CM_REG(0) macro
/openbmc/u-boot/board/freescale/mx31pdk/
H A Dlowlevel_init.S16 write32 IPU_CONF, IPU_CONF_DI_EN
/openbmc/u-boot/drivers/video/
H A Dipu_common.c533 debug("IPU_CONF = \t0x%08X\n", __raw_readl(IPU_CONF)); in ipu_dump_registers()
595 ipu_conf = __raw_readl(IPU_CONF); in ipu_init_channel()
655 __raw_writel(ipu_conf, IPU_CONF); in ipu_init_channel()
693 ipu_conf = __raw_readl(IPU_CONF); in ipu_uninit_channel()
741 __raw_writel(ipu_conf, IPU_CONF); in ipu_uninit_channel()
H A Dmx3fb.c732 reg = readl(IPU_CONF) | IPU_CONF_SDC_EN | IPU_CONF_DI_EN; in ll_disp3_enable()
733 writel(reg, IPU_CONF); in ll_disp3_enable()
H A Dipu_regs.h301 #define IPU_CONF (&IPU_CM_REG->conf) macro
/openbmc/u-boot/arch/arm/include/asm/arch-mx35/
H A Dimx-regs.h158 #define IPU_CONF IPU_CTRL_BASE_ADDR macro
/openbmc/u-boot/arch/arm/include/asm/arch-mx31/
H A Dimx-regs.h665 #define IPU_CONF IPU_BASE macro