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Searched refs:IPU_CHA_BUF0_RDY (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/video/
H A Dmx3fb.c101 #define IPU_CHA_BUF0_RDY (0x04 + IPU_BASE) macro
609 reg = readl(IPU_CHA_BUF0_RDY); in ipu_update_channel_buffer()
634 writel(1UL << channel, IPU_CHA_BUF0_RDY); in idmac_tx_submit()
H A Dipu_regs.h317 #define IPU_CHA_BUF0_RDY(ch) (&IPU_STAT->ch_buf0_rdy[ch / 32]) macro
H A Dipu_common.c1119 if (idma_is_set(IPU_CHA_BUF0_RDY, dma_ch)) { in ipu_clear_buffer_ready()
1121 IPU_CHA_BUF0_RDY(dma_ch)); in ipu_clear_buffer_ready()
/openbmc/linux/drivers/gpu/ipu-v3/
H A Dipu-common.c440 reg = ipu_cm_read(ipu, IPU_CHA_BUF0_RDY(channel->num)); in ipu_idmac_buffer_is_ready()
465 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno)); in ipu_idmac_select_buffer()
484 ipu_cm_write(ipu, idma_mask(chno), IPU_CHA_BUF0_RDY(chno)); in ipu_idmac_clear_buffer()
560 if (ipu_cm_read(ipu, IPU_CHA_BUF0_RDY(channel->num)) & in ipu_idmac_disable_channel()
563 IPU_CHA_BUF0_RDY(channel->num)); in ipu_idmac_disable_channel()
H A Dipu-prv.h61 #define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32)) macro