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Searched refs:IOASIC_MCR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/mips/include/asm/dec/
H A Dioasic_addrs.h39 #define IOASIC_MCR (11*IOASIC_SLOT_SIZE) /* memory control (3max+) */ macro
/openbmc/linux/arch/mips/dec/
H A Decc-berr.c245 volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in dec_kn03_be_init()
/openbmc/linux/drivers/mtd/devices/
H A Dms02-nv.c283 csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in ms02nv_init()