Searched refs:INTEL_CX0_LANE0 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_cx0_phy.c | 28 #define INTEL_CX0_LANE0 BIT(0) macro
30 #define INTEL_CX0_BOTH_LANES (INTEL_CX0_LANE1 | INTEL_CX0_LANE0)
1812 u8 lane = INTEL_CX0_LANE0; in intel_c10pll_readout_hw_state()
2284 intel_c20_sram_write(i915, encoder->port, INTEL_CX0_LANE0, in intel_c20_pll_program()
2288 intel_c20_sram_write(i915, encoder->port, INTEL_CX0_LANE0, in intel_c20_pll_program()
2295 intel_c20_sram_write(i915, encoder->port, INTEL_CX0_LANE0, in intel_c20_pll_program()
2299 intel_c20_sram_write(i915, encoder->port, INTEL_CX0_LANE0, in intel_c20_pll_program()
2540 INTEL_CX0_LANE0; in intel_cx0_phy_lane_reset()
2569 INTEL_CX0_LANE0), in intel_cx0_phy_lane_reset()
2575 INTEL_CX0_LANE0), in intel_cx0_phy_lane_reset()
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