Searched refs:INREG (Results 1 – 4 of 4) sorted by relevance
| /openbmc/u-boot/drivers/video/ |
| H A D | ati_radeon_fb.h | 70 #define INREG(addr) readl((rinfo->mmio_base)+addr) macro 78 tmp = INREG(addr); in _OUTREGP() 98 if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY)) in radeon_engine_flush() 110 if ((INREG(RBBM_STATUS) & 0x7f) >= entries) in _radeon_fifo_wait() 125 if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { in _radeon_engine_idle() 252 data = INREG(CLOCK_CNTL_DATA); in __INPLL()
|
| H A D | ati_radeon_fb.c | 113 u32 tom = INREG(NB_TOM); in radeon_identify_vram() 123 OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000); in radeon_identify_vram() 134 tmp = INREG(CONFIG_MEMSIZE); in radeon_identify_vram() 159 (INREG(MEM_SDRAM_MODE_REG) & (1<<30))) in radeon_identify_vram() 164 tmp = INREG(MEM_CNTL); in radeon_identify_vram() 576 rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16; in radeon_probe()
|
| /openbmc/qemu/target/hexagon/idef-parser/ |
| H A D | macros.h.inc | 84 #define fEXTRACTU_BIDIR(INREG, WIDTH, OFFSET) \ 85 (fZXTN(WIDTH, 32, fBIDIR_LSHIFTR((INREG), (OFFSET), 4_8)))
|
| /openbmc/qemu/target/hexagon/imported/ |
| H A D | macros.def | 79 (fZXTN(WIDTH,32,(INREG >> OFFSET))), 85 (fZXTN(WIDTH,32,fBIDIR_LSHIFTR((INREG),(OFFSET),4_8))), 91 (fZXTN((HIBIT-LOWBIT+1),32,(INREG >> LOWBIT))), 102 INREG &= ~(((fCONSTLL(1)<<width)-1)<<offset); 104 INREG |= ((INVAL & ((fCONSTLL(1)<<width)-1)) << offset);
|