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Searched refs:IMX_DMAC_BASE (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h37 #define IMX_DMAC_BASE (0x09000 + IMX_IO_BASE) macro
334 #define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */
336 #define DIMR __REG(IMX_DMAC_BASE +0x08) /* DMA Interrupt mask Register */
338 #define DRTOSR __REG(IMX_DMAC_BASE +0x10) /* DMA Request timeout Register */
342 #define WSRA __REG(IMX_DMAC_BASE +0x40) /* W-Size Register A */
343 #define XSRA __REG(IMX_DMAC_BASE +0x44) /* X-Size Register A */
344 #define YSRA __REG(IMX_DMAC_BASE +0x48) /* Y-Size Register A */
345 #define WSRB __REG(IMX_DMAC_BASE +0x4c) /* W-Size Register B */
346 #define XSRB __REG(IMX_DMAC_BASE +0x50) /* X-Size Register B */
347 #define YSRB __REG(IMX_DMAC_BASE +0x54) /* Y-Size Register B */
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