Home
last modified time | relevance | path

Searched refs:IMX6UL_CLK_PLL1_SW (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6ul-clock.h70 #define IMX6UL_CLK_PLL1_SW 57 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx6ul-clock.h66 #define IMX6UL_CLK_PLL1_SW 57 macro
/openbmc/u-boot/arch/arm/dts/
H A Dimx6ull.dtsi75 <&clks IMX6UL_CLK_PLL1_SW>,
149 <&clks IMX6UL_PLL1_BYPASS>, <&clks IMX6UL_CLK_PLL1_SYS>, <&clks IMX6UL_CLK_PLL1_SW>,
H A Dimx6ul.dtsi79 <&clks IMX6UL_CLK_PLL1_SW>,
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6ul.c253 …hws[IMX6UL_CLK_PLL1_SW] = imx_clk_hw_mux_flags("pll1_sw", base + 0x0c, 2, 1, pll1_sw_sels, AR… in imx6ul_clocks_init()
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ul.dtsi84 <&clks IMX6UL_CLK_PLL1_SW>,