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Searched refs:IMMR (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A DKconfig38 bool "Enable various commands to dump IMMR information"
175 hex "Value for IMMR"
/openbmc/u-boot/board/freescale/mpc8323erdb/
H A DREADME10 0xe000_0000 0xe00f_ffff IMMR 1M
/openbmc/linux/arch/powerpc/platforms/8xx/
H A DKconfig190 bool "Pinned TLB for IMMR"
194 This pins the IMMR area with a 512kbytes page. In case
/openbmc/u-boot/board/freescale/mpc8315erdb/
H A DREADME36 0xe000_0000 0xe00f_ffff IMMR 1M
/openbmc/u-boot/board/freescale/mpc8313erdb/
H A DREADME36 0xe000_0000 0xe00f_ffff IMMR 1M
/openbmc/u-boot/board/freescale/mpc8349itx/
H A DREADME49 0xE000_0000 - 0xEFFF_FFFF IMMR (1 MB)
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h648 #define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */ macro
/openbmc/u-boot/doc/
H A DREADME.POST348 location in IMMR. On booting, the POST layer will check the value of
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc726 (Logical immediate). Both insn groups have N, IMMR and IMMS fields
/openbmc/u-boot/
H A DREADME3100 - MPC8xx: IMMR (internal memory of the CPU)
4582 models provide on-chip memory (like the IMMR area on MPC8xx and