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Searched refs:ICR0 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7720.h54 #define ICR0 0xA414FEE0 macro
H A Dcpu_sh7780.h41 #define ICR0 0xFFD00000 macro
H A Dcpu_sh7722.h43 #define ICR0 0xA4140000 macro
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Drenesas,intc-irqpin.yaml30 - description: Interrupt control register for ICR0 with IRLM0 bit
/openbmc/linux/drivers/irqchip/
H A Dirq-renesas-rza1.c23 #define ICR0 0 /* Interrupt Control Register 0 */ macro