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Searched refs:ICPU_SW_MODE_SW_SPI_CS_OE_M (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h58 #define ICPU_SW_MODE_SW_SPI_CS_OE_M GENMASK(4, 1) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h58 #define ICPU_SW_MODE_SW_SPI_CS_OE_M GENMASK(4, 1) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h54 #define ICPU_SW_MODE_SW_SPI_CS_OE_M GENMASK(4, 1) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h61 #define ICPU_SW_MODE_SW_SPI_CS_OE_M GENMASK(4, 1) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h59 #define ICPU_SW_MODE_SW_SPI_CS_OE_M GENMASK(4, 1) macro