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Searched refs:ICPU_MEMPHY_CFG (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h377 setbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_FIFO_RST); in memphy_soft_reset()
379 clrbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_FIFO_RST); in memphy_soft_reset()
459 writel(readl(BASE_CFG + ICPU_MEMPHY_CFG) | in hal_vcoreiii_ddr_reset_assert()
460 ICPU_MEMPHY_CFG_PHY_RST, BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_reset_assert()
649 setbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_RST); in hal_vcoreiii_ddr_reset_assert()
659 register u32 memphy_cfg = readl(BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
663 BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
665 BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
667 BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
752 writel(ICPU_MEMPHY_CFG_PHY_SSTL_ENA, BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_init_memctl()
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/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h218 #define ICPU_MEMPHY_CFG 0x278 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h230 #define ICPU_MEMPHY_CFG 0x160 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h269 #define ICPU_MEMPHY_CFG 0x158 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h276 #define ICPU_MEMPHY_CFG 0x180 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h274 #define ICPU_MEMPHY_CFG 0x160 macro