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Searched refs:ICPU_MEMCTRL_MR3_VAL (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h191 #define ICPU_MEMCTRL_MR3_VAL 0x264 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h202 #define ICPU_MEMCTRL_MR3_VAL 0x144 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h216 #define ICPU_MEMCTRL_MR3_VAL 0x13c macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h223 #define ICPU_MEMCTRL_MR3_VAL 0x164 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h221 #define ICPU_MEMCTRL_MR3_VAL 0x144 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h794 writel(MSCC_MEMPARM_MR3, BASE_CFG + ICPU_MEMCTRL_MR3_VAL); in hal_vcoreiii_init_memctl()