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Searched refs:ICPU_MEMCTRL_DQS_DLY_DQS_DLY_M (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h216 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY_M GENMASK(4, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h228 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY_M GENMASK(4, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h254 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY_M GENMASK(4, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h261 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY_M GENMASK(4, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h259 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY_M GENMASK(4, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h338 r &= ~ICPU_MEMCTRL_DQS_DLY_DQS_DLY_M; in set_dly()