Searched refs:ICPU_MEMCTRL_DQS_DLY (Results 1 – 6 of 6) sorted by relevance
336 register u32 r = readl(BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)); in set_dly()340 writel(r, BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)); in set_dly()345 register u32 r = readl(BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)); in incr_dly()348 writel(r + 1, BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)); in incr_dly()357 register u32 r = readl(BASE_CFG + ICPU_MEMCTRL_DQS_DLY(0)); in adjust_dly()360 writel(r + adjust, BASE_CFG + ICPU_MEMCTRL_DQS_DLY(0)); in adjust_dly()370 register u32 r = readl(BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)) - start; in center_dly()372 writel(start + (r >> 1), BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)); in center_dly()588 dqs_s = readl(BASE_CFG + ICPU_MEMCTRL_DQS_DLY(bytelane)); in hal_vcoreiii_train_bytelane()
206 #define ICPU_MEMCTRL_DQS_DLY(x) (0x270) macro
217 #define ICPU_MEMCTRL_DQS_DLY(x) (0x150 + 0x4 * (x)) macro
243 #define ICPU_MEMCTRL_DQS_DLY(x) (0x148 + 0x4 * (x)) macro
250 #define ICPU_MEMCTRL_DQS_DLY(x) (0x170 + 0x4 * (x)) macro
248 #define ICPU_MEMCTRL_DQS_DLY(x) (0x150 + 0x4 * (x)) macro