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Searched refs:ICPU_MEMCTRL_CFG (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h485 register u32 val = readl(BASE_CFG + ICPU_MEMCTRL_CFG); in hal_vcoreiii_ddr_verified()
490 writel(val, BASE_CFG + ICPU_MEMCTRL_CFG); in hal_vcoreiii_ddr_verified()
777 writel(MSCC_MEMPARM_MEMCFG, BASE_CFG + ICPU_MEMCTRL_CFG); in hal_vcoreiii_init_memctl()
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h74 #define ICPU_MEMCTRL_CFG 0x238 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h85 #define ICPU_MEMCTRL_CFG 0x114 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h83 #define ICPU_MEMCTRL_CFG 0x10c macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h90 #define ICPU_MEMCTRL_CFG 0x134 macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h88 #define ICPU_MEMCTRL_CFG 0x114 macro