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Searched refs:ICC_CTLR_EL3 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/
H A Dgic.h98 #define ICC_CTLR_EL3 S3_6_C12_C12_4 macro
/openbmc/u-boot/arch/arm/lib/
H A Dgic_64.S123 msr ICC_CTLR_EL3, xzr
/openbmc/qemu/hw/intc/
H A Dtrace-events125 gicv3_icc_ctlr_el3_read(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR_EL3 read cpu 0x%x value 0x%" PR…
126 gicv3_icc_ctlr_el3_write(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR_EL3 write cpu 0x%x value 0x%" …
/openbmc/linux/Documentation/arch/arm64/
H A Dbooting.rst228 - ICC_CTLR_EL3.PMHE (bit 6) must be set to the same value across