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Searched refs:ICCR (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/arch/m68k/ifpsp060/src/
H A Ditest.S33 set ICCR, -132
173 mov.w &0x0004,ICCR(%a6)
197 mov.w &0x0004,ICCR(%a6)
220 mov.w &0x0000,ICCR(%a6)
243 mov.w &0x0000,ICCR(%a6)
267 mov.w &0x0000,ICCR(%a6)
291 mov.w &0x0008,ICCR(%a6)
315 mov.w &0x00000,ICCR(%a6)
339 mov.w &0x0008,ICCR(%a6)
363 mov.w &0x0008,ICCR(%a6)
[all …]
H A Dftest.S36 set ICCR, -346
243 mov.w &0x0000,ICCR(%a6)
283 mov.w &0x0000,ICCR(%a6)
324 mov.w &0x0000,ICCR(%a6)
364 mov.w &0x0000,ICCR(%a6)
400 mov.w &0x0000,ICCR(%a6)
436 mov.w &0x0000,ICCR(%a6)
477 mov.w &0x0000,ICCR(%a6)
515 mov.w &0x0000,ICCR(%a6)
551 mov.w &0x0000,ICCR(%a6)
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-sa11x0.c24 #define ICCR 0x0C /* IC Control Reg. */ macro
95 st->iccr = readl_relaxed(iobase + ICCR); in sa1100irq_suspend()
110 writel_relaxed(st->iccr, iobase + ICCR); in sa1100irq_resume()
164 writel_relaxed(1, iobase + ICCR); in sa11x0_init_irq_nodt()
/openbmc/linux/drivers/i2c/busses/
H A Di2c-sh_mobile.c151 #define ICCR 0x04 macro
314 iic_wr(pd, ICCR, ICCR_ICE | ICCR_TRS | ICCR_BBSY); in i2c_op()
324 iic_wr(pd, ICCR, pd->send_stop ? ICCR_ICE | ICCR_TRS in i2c_op()
328 iic_wr(pd, ICCR, ICCR_ICE | ICCR_SCP); in i2c_op()
337 iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK); in i2c_op()
344 iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK); in i2c_op()
566 iic_wr(pd, ICCR, ICCR_SCP); in start_ch()
569 iic_wr(pd, ICCR, ICCR_ICE | ICCR_SCP); in start_ch()
708 iic_wr(pd, ICCR, ICCR_SCP); in sh_mobile_xfer()
756 iic_set_clr(pd, ICCR, ICCR_ICE, 0); in sh_mobile_i2c_r8a7740_workaround()
[all …]
/openbmc/linux/arch/arm/mach-pxa/
H A Dirq.c34 #define ICCR (0x014) macro
164 __raw_writel(1, irq_base(0) + ICCR); in pxa_init_irq_common()
216 __raw_writel(1, pxa_irq_base + ICCR); in pxa_irq_resume()
/openbmc/linux/arch/arm/mach-sa1100/
H A Dpm.c94 ICCR = 1; in sa11x0_pm_enter()
/openbmc/qemu/hw/arm/
H A Dstrongarm.c101 #define ICCR 0x0c macro
140 case ICCR: in strongarm_pic_mem_read()
166 case ICCR: in strongarm_pic_mem_write()
/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1213 #define ICCR __REG(0x9005000C) /* IC Control Reg. */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1143 #define ICCR 0x40D00014 /* Interrupt Controller Control Register */ macro
/openbmc/u-boot/include/
H A DSA-1100.h1640 #define ICCR /* IC Control Reg. */ \ macro