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Searched refs:ICACHE (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/arch/nds32/lib/
H A Dcache.c12 if (cache == ICACHE) in CACHE_SET()
22 if (cache == ICACHE) in CACHE_WAY()
32 if (cache == ICACHE) in CACHE_LINE_SIZE()
45 line_size = CACHE_LINE_SIZE(ICACHE); in invalidate_icache_all()
46 end = line_size * CACHE_WAY(ICACHE) * CACHE_SET(ICACHE); in invalidate_icache_all()
65 line_size = CACHE_LINE_SIZE(ICACHE); in invalidate_icache_range()
/openbmc/linux/arch/csky/include/uapi/asm/
H A Dcachectl.h9 #define ICACHE (1<<0) macro
11 #define BCACHE (ICACHE|DCACHE)
/openbmc/linux/arch/parisc/include/uapi/asm/
H A Dcachectl.h8 #define ICACHE (1<<0) /* flush instruction cache */ macro
10 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/linux/arch/mips/include/uapi/asm/
H A Dcachectl.h15 #define ICACHE (1<<0) /* flush instruction cache */ macro
17 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/u-boot/arch/mips/include/asm/
H A Dcachectl.h11 #define ICACHE (1<<0) /* flush instruction cache */ macro
13 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/linux/arch/sh/include/uapi/asm/
H A Dcachectl.h16 #define ICACHE CACHEFLUSH_I /* flush instruction cache */ macro
18 #define BCACHE (ICACHE|DCACHE) /* flush both caches */
/openbmc/u-boot/arch/arm/cpu/armv7m/
H A Dcache.c42 ICACHE, enumerator
121 else if (type == ICACHE) in get_cline_size()
146 type = ICACHE; in action_cache_range()
/openbmc/linux/arch/arc/include/uapi/asm/
H A Dcachectl.h25 #define ICACHE CF_I_INV macro
/openbmc/linux/arch/csky/mm/
H A Dsyscache.c22 case ICACHE: in SYSCALL_DEFINE3()
/openbmc/u-boot/arch/nds32/include/asm/
H A Dcache.h30 enum cache_t {ICACHE, DCACHE}; enumerator
/openbmc/qemu/util/
H A Dcacheflush.c313 cacheflush((void *)rx, len, ICACHE); in flush_idcache_range()
/openbmc/linux/arch/parisc/kernel/
H A Dcache.c963 if (cache & ICACHE && error == 0) { in SYSCALL_DEFINE3()