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Searched refs:HIT_WRITEBACK_INV_D (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/lib/
H A Dcache.c122 HIT_WRITEBACK_INV_D, HIT_INVALIDATE_I); in flush_cache()
127 cache_loop(start_addr, start_addr + size, dlsize, HIT_WRITEBACK_INV_D); in flush_cache()
152 cache_loop(start_addr, stop, lsize, HIT_WRITEBACK_INV_D); in flush_dcache_range()
/openbmc/u-boot/arch/mips/include/asm/
H A Dcacheops.h58 #define HIT_WRITEBACK_INV_D 0x15 macro