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Searched refs:HIT_INVALIDATE_I (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/include/asm/
H A Dcacheops.h53 #define HIT_INVALIDATE_I 0x00 macro
55 #define HIT_INVALIDATE_I 0x10 macro
/openbmc/u-boot/arch/mips/lib/
H A Dcache.c122 HIT_WRITEBACK_INV_D, HIT_INVALIDATE_I); in flush_cache()
133 cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I); in flush_cache()