Searched refs:HI6220_BBPPLL0_DIV (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | hi6220-clock.h | 120 #define HI6220_BBPPLL0_DIV 56 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | hi6220-clock.h | 122 #define HI6220_BBPPLL0_DIV 56 macro
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | hisilicon,hi6210-i2s.txt | 32 <&sys_ctrl HI6220_BBPPLL0_DIV>;
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| /openbmc/linux/drivers/clk/hisilicon/ |
| H A D | clk-hi6220.c | 172 { HI6220_BBPPLL0_DIV, "bbppll0_div", "bbppll_sel", CLK_SET_RATE_PARENT, 0x4a0, 8, 6, 15,},
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| /openbmc/linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hi6220.dtsi | 869 <&sys_ctrl HI6220_BBPPLL0_DIV>;
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