Home
last modified time | relevance | path

Searched refs:HHI_VID_CLK_DIV (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vclk.c40 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
259 hhi_update_bits(HHI_VID_CLK_DIV, in meson_venci_cvbs_clock_config()
650 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
717 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
721 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
731 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
736 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
747 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
752 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
763 hhi_update_bits(HHI_VID_CLK_DIV, in meson_vclk_set()
[all …]
/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_vclk.c66 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
314 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_venci_cvbs_clock_config()
887 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
950 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
954 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
964 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
968 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
978 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
982 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
992 regmap_update_bits(priv->hhi, HHI_VID_CLK_DIV, in meson_vclk_set()
[all …]
/openbmc/linux/drivers/clk/meson/
H A Dmeson8b.h35 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
H A Daxg.h61 #define HHI_VID_CLK_DIV 0x164 macro
H A Dgxbb.h44 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro
H A Dg12a.h62 #define HHI_VID_CLK_DIV 0x164 macro
H A Dmeson8b.c1214 .offset = HHI_VID_CLK_DIV,
1256 .offset = HHI_VID_CLK_DIV,
1615 .offset = HHI_VID_CLK_DIV,
1646 .offset = HHI_VID_CLK_DIV,
1677 .offset = HHI_VID_CLK_DIV,
H A Dgxbb.c1908 .offset = HHI_VID_CLK_DIV,
1936 .offset = HHI_VID_CLK_DIV,
2256 .offset = HHI_VID_CLK_DIV,
2272 .offset = HHI_VID_CLK_DIV,
H A Daxg.c1331 .offset = HHI_VID_CLK_DIV,
1359 .offset = HHI_VID_CLK_DIV,
H A Dg12a.c3174 .offset = HHI_VID_CLK_DIV,
3202 .offset = HHI_VID_CLK_DIV,
3522 .offset = HHI_VID_CLK_DIV,
3538 .offset = HHI_VID_CLK_DIV,
/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-axg.h60 #define HHI_VID_CLK_DIV 0x164 macro
H A Dclock-gx.h43 #define HHI_VID_CLK_DIV 0x164 /* 0x59 offset in data sheet */ macro