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Searched refs:HDMI_ACR_32_1 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h78 SRI(HDMI_ACR_32_1, DIG, id),\
183 SE_SF(HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\
679 uint32_t HDMI_ACR_32_1; member
H A Ddce_stream_encoder.c1302 REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz); in dce110_se_setup_hdmi_audio()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.h69 SRI(HDMI_ACR_32_1, DIG, id),\
163 uint32_t HDMI_ACR_32_1; member
H A Ddcn10_stream_encoder.c1289 REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz); in enc1_se_setup_hdmi_audio()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Devergreen_hdmi.c89 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); in evergreen_hdmi_update_acr()
H A Drv770d.h789 #define HDMI_ACR_32_1 0x74b0 macro
H A Devergreend.h643 #define HDMI_ACR_32_1 0x70e0 macro
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.h71 SRI(HDMI_ACR_32_1, DIG, id),\
H A Ddcn30_dio_stream_encoder.c797 REG_UPDATE(HDMI_ACR_32_1, HDMI_ACR_N_32, audio_clock_info.n_32khz); in enc3_se_setup_hdmi_audio()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.h72 SRI(HDMI_ACR_32_1, DIG, id),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.h278 SRI_ARR(HDMI_ACR_32_0, DIG, id), SRI_ARR(HDMI_ACR_32_1, DIG, id), \
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1429 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v6_0_audio_set_acr()
H A Ddce_v10_0.c1492 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v10_0_afmt_update_ACR()
H A Ddce_v11_0.c1541 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v11_0_afmt_update_ACR()