| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | rk3128-cru.h | 138 #define HCLK_IEP 468 macro
|
| H A D | rk3228-cru.h | 137 #define HCLK_IEP 468 macro
|
| H A D | rv1108-cru.h | 153 #define HCLK_IEP 334 macro
|
| H A D | rk3328-cru.h | 200 #define HCLK_IEP 339 macro
|
| H A D | rk3288-cru.h | 186 #define HCLK_IEP 468 macro
|
| H A D | rk3368-cru.h | 173 #define HCLK_IEP 468 macro
|
| H A D | rockchip,rv1126-cru.h | 283 #define HCLK_IEP 219 macro
|
| H A D | rk3399-cru.h | 317 #define HCLK_IEP 477 macro
|
| H A D | rk3568-cru.h | 310 #define HCLK_IEP 247 macro
|
| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | rk3288-cru.h | 178 #define HCLK_IEP 468 macro
|
| H A D | rv1108-cru.h | 156 #define HCLK_IEP 334 macro
|
| H A D | rk3368-cru.h | 173 #define HCLK_IEP 468 macro
|
| H A D | rk3328-cru.h | 198 #define HCLK_IEP 439 macro
|
| H A D | rk3399-cru.h | 315 #define HCLK_IEP 477 macro
|
| /openbmc/linux/Documentation/devicetree/bindings/power/ |
| H A D | rockchip,power-controller.yaml | 210 <&cru HCLK_IEP>;
|
| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rk3128.c | 470 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
|
| H A D | clk-rk3228.c | 544 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 3, GFLAGS),
|
| H A D | clk-rk3328.c | 716 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0, RK3328_CLKGATE_CON(21), 7, GFLAGS),
|
| H A D | clk-rv1108.c | 450 GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0,
|
| H A D | clk-rk3368.c | 742 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3368_CLKGATE_CON(16), 3, GFLAGS),
|
| H A D | clk-rk3288.c | 790 GATE(HCLK_IEP, "hclk_iep", "hclk_vio", 0, RK3288_CLKGATE_CON(15), 3, GFLAGS),
|
| H A D | clk-rv1126.c | 759 GATE(HCLK_IEP, "hclk_iep", "hclk_pdvo", 0,
|
| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk322x.dtsi | 205 <&cru HCLK_IEP>,
709 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
|
| H A D | rv1126.dtsi | 209 <&cru HCLK_IEP>,
|
| /openbmc/linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3368.dtsi | 661 <&cru HCLK_IEP>,
827 clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
|