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Searched refs:HCLK_CIF0 (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3188-cru-common.h122 #define HCLK_CIF0 464 macro
H A Drv1108-cru.h153 #define HCLK_CIF0 331 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3188-cru-common.h124 #define HCLK_CIF0 464 macro
H A Drv1108-cru.h150 #define HCLK_CIF0 331 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rv1108.c316 GATE(HCLK_CIF0, "hclk_cif0", "hclk_vio_pre", 0,
H A Dclk-rk3188.c460 GATE(HCLK_CIF0, "hclk_cif0", "hclk_cpu", 0, RK2928_CLKGATE_CON(6), 4, GFLAGS),
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi720 <&cru HCLK_CIF0>,
H A Drk3066a.dtsi775 <&cru HCLK_CIF0>,