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Searched refs:GTE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/Documentation/driver-api/hte/
H A Dtegra-hte.rst8 The Nvidia tegra HTE provider also known as GTE (Generic Timestamping Engine)
9 driver implements two GTE instances: 1) GPIO GTE and 2) LIC
10 (Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the timestamp
14 GPIO GTE
17 This GTE instance timestamps GPIO in real time. For that to happen GPIO
20 the GPIO GTE. To support this, GPIOLIB adds two optional APIs as mentioned
21 below. The GPIO GTE code supports both kernel and userspace consumers. The
34 LIC (Legacy Interrupt Controller) IRQ GTE
42 this GTE instance in the HTE framework.
44 The provider source code of both IRQ and GPIO GTE instances is located at
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/openbmc/linux/Documentation/devicetree/bindings/timestamp/
H A Dnvidia,tegra194-hte.yaml13 Tegra SoC has two instances of generic hardware timestamping engines (GTE)
14 known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
18 to enable or disable for the hardware timestamping. The GTE GPIO monitors
50 GTE instances for both Tegra194 and Tegra234 has 3 slices. The Tegra194
58 namespace conversion between GPIO and GTE.
63 consumers. For the GTE IRQ, this is IRQ number as mentioned in the
64 SoC technical reference manual. For the GTE GPIO, its value is same as
/openbmc/linux/drivers/hte/
H A DKconfig22 known as generic timestamping engine (GTE) support on NVIDIA Tegra194
30 The NVIDIA Tegra194 GTE test driver demonstrates how to use HTE
/openbmc/intel-ipmi-oem/include/
H A Dbiosxml.hpp66 GTE, enumerator
444 case knob::DepexOperators::GTE: in evaluateExprStack()
573 operators.emplace(knob::DepexOperators::GTE); in evaluateExpression()
/openbmc/qemu/target/hexagon/idef-parser/
H A Didef-parser.y54 %token ASR LSR EQ NEQ LTE GTE MIN MAX ANDL FOR ICIRC IF MUN FSCR FCHK SXT
86 %left '<' '>' LTE GTE
643 | rvalue GTE rvalue