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Searched refs:GPLL_MODE_SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3036.h87 GPLL_MODE_SHIFT = 12, enumerator
88 GPLL_MODE_MASK = 3 << GPLL_MODE_SHIFT,
H A Dcru_rk322x.h91 GPLL_MODE_SHIFT = 12, enumerator
92 GPLL_MODE_MASK = 1 << GPLL_MODE_SHIFT,
H A Dcru_rk3128.h92 GPLL_MODE_SHIFT = 12, enumerator
93 GPLL_MODE_MASK = 3 << GPLL_MODE_SHIFT,
H A Dcru_rk3288.h185 GPLL_MODE_SHIFT = 0xc, enumerator
186 GPLL_MODE_MASK = CRU_MODE_MASK << GPLL_MODE_SHIFT,
H A Dcru_rk3188.h151 GPLL_MODE_SHIFT = 12, enumerator
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3188.c234 GPLL_MODE_SHIFT in rkclk_pll_get_rate()
379 GPLL_MODE_MASK << GPLL_MODE_SHIFT | in rkclk_init()
381 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
449 GPLL_MODE_MASK << GPLL_MODE_SHIFT | in rkclk_init()
451 GPLL_MODE_NORMAL << GPLL_MODE_SHIFT | in rkclk_init()
H A Dclk_rk3036.c87 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
164 GPLL_MODE_NORM << GPLL_MODE_SHIFT | in rkclk_init()
178 GPLL_MODE_SHIFT, 0xff in rkclk_pll_get_rate()
H A Dclk_rk322x.c88 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
165 GPLL_MODE_NORM << GPLL_MODE_SHIFT | in rkclk_init()
179 GPLL_MODE_SHIFT, 0xff in rkclk_pll_get_rate()
H A Dclk_rk3128.c149 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
226 GPLL_MODE_NORM << GPLL_MODE_SHIFT | in rkclk_init()
247 GPLL_MODE_SHIFT, 0xff in rkclk_pll_get_rate()
H A Dclk_rk3288.c430 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
491 GPLL_MODE_NORMAL << GPLL_MODE_SHIFT | in rkclk_init()
546 GPLL_MODE_SHIFT, NPLL_MODE_SHIFT in rkclk_pll_get_rate()
H A Dclk_rk3328.c75 GPLL_MODE_SHIFT = 12, enumerator
229 mode_shift = GPLL_MODE_SHIFT; in rkclk_set_pll()