Searched refs:GPLL0 (Results 1 – 25 of 95) sorted by relevance
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,mmcc.yaml | 113 - description: MMSS GPLL0 voted clock 114 - description: GPLL0 voted clock 141 - description: MMSS GPLL0 voted clock 142 - description: GPLL0 voted clock 180 - description: MMSS GPLL0 voted clock 181 - description: GPLL0 clock 182 - description: GPLL0 voted clock
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H A D | qcom,sm6115-gpucc.yaml | 26 - description: GPLL0 main branch source 27 - description: GPLL0 main div source
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H A D | qcom,gpucc-sdm660.yaml | 27 - description: GPLL0 main gpu branch 28 - description: GPLL0 divider gpu branch
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H A D | qcom,sm8450-gpucc.yaml | 30 - description: GPLL0 main branch source 31 - description: GPLL0 div branch source
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H A D | qcom,sm6375-gpucc.yaml | 26 - description: GPLL0 main branch source 27 - description: GPLL0 div branch source
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H A D | qcom,qcm2290-dispcc.yaml | 26 - description: GPLL0 source from GCC 27 - description: GPLL0 div source from GCC
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H A D | qcom,sdm845-dispcc.yaml | 28 - description: GPLL0 source from GCC 29 - description: GPLL0 div source from GCC
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H A D | qcom,gpucc.yaml | 44 - description: GPLL0 main branch source 45 - description: GPLL0 div branch source
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H A D | qcom,sm6125-gpucc.yaml | 26 - description: GPLL0 main branch source
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H A D | qcom,sm6375-dispcc.yaml | 28 - description: GPLL0 source from GCC
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H A D | qcom,sm6115-dispcc.yaml | 29 - description: GPLL0 DISP DIV clock from GCC
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H A D | qcom,msm8998-gpucc.yaml | 25 - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,osm-l3.yaml | 66 #define GPLL0 165 73 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | qcom,gcc-mdm9607.h | 9 #define GPLL0 0 macro
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H A D | qcom,gcc-sdx55.h | 10 #define GPLL0 3 macro
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H A D | qcom,gcc-sdx65.h | 10 #define GPLL0 0 macro
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H A D | qcom,gcc-sc7180.h | 11 #define GPLL0 1 macro
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H A D | qcom,gcc-sdm660.h | 111 #define GPLL0 101 macro
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H A D | qcom,gcc-sm6350.h | 11 #define GPLL0 0 macro
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H A D | qcom,gcc-msm8994.h | 11 #define GPLL0 1 macro
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H A D | qcom,gcc-msm8916.h | 9 #define GPLL0 0 macro
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H A D | qcom,sm7150-gcc.h | 13 #define GPLL0 1 macro
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H A D | qcom,sdx75-gcc.h | 10 #define GPLL0 0 macro
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H A D | qcom,gcc-msm8917.h | 149 #define GPLL0 142 macro
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H A D | qcom,gcc-qcm2290.h | 10 #define GPLL0 0 macro
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