Home
last modified time | relevance | path

Searched refs:GCC_MSS_GPLL0_DIV_CLK_SRC (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sdm845.h47 #define GCC_MSS_GPLL0_DIV_CLK_SRC 37 macro
H A Dqcom,gcc-msm8998.h182 #define GCC_MSS_GPLL0_DIV_CLK_SRC 173 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sdm845.c3564 [GCC_MSS_GPLL0_DIV_CLK_SRC] = &gcc_mss_gpll0_div_clk_src.clkr,
3717 [GCC_MSS_GPLL0_DIV_CLK_SRC] = &gcc_mss_gpll0_div_clk_src.clkr,
H A Dgcc-msm8998.c3124 [GCC_MSS_GPLL0_DIV_CLK_SRC] = &gcc_mss_gpll0_div_clk_src.clkr,
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8998.dtsi1456 <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
H A Dsdm845.dtsi3292 <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,