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Searched refs:FSL_CORENET_DCSR_SZ_1G (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu_init.c501 setbits_be32(&gur->dcsrcr, FSL_CORENET_DCSR_SZ_1G); in cpu_init_f()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h1982 #define FSL_CORENET_DCSR_SZ_1G 0x3 macro