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Searched refs:FIELD (Results 1 – 25 of 74) sorted by relevance

123

/openbmc/qemu/include/hw/misc/
H A Dxlnx-versal-cfu.h35 FIELD(CFU_ISR, USR_GTS_EVENT, 9, 1)
36 FIELD(CFU_ISR, USR_GSR_EVENT, 8, 1)
37 FIELD(CFU_ISR, SLVERR, 7, 1)
38 FIELD(CFU_ISR, DECOMP_ERROR, 6, 1)
39 FIELD(CFU_ISR, BAD_CFI_PACKET, 5, 1)
40 FIELD(CFU_ISR, AXI_ALIGN_ERROR, 4, 1)
41 FIELD(CFU_ISR, CFI_ROW_ERROR, 3, 1)
42 FIELD(CFU_ISR, CRC32_ERROR, 2, 1)
43 FIELD(CFU_ISR, CRC8_ERROR, 1, 1)
44 FIELD(CFU_ISR, SEU_ENDOFCALIB, 0, 1)
[all …]
H A Dxlnx-versal-cframe-reg.h39 FIELD(CRC, CRC, 0, 32)
44 FIELD(FAR0, SEGMENT, 23, 2)
45 FIELD(FAR0, BLOCKTYPE, 20, 3)
46 FIELD(FAR0, FRAME_ADDR, 0, 20)
51 FIELD(FAR_SFR0, BLOCKTYPE, 20, 3)
52 FIELD(FAR_SFR0, FRAME_ADDR, 0, 20)
61 FIELD(FRCNT0, FRCNT, 0, 32)
66 FIELD(CMD0, CMD, 0, 5)
75 FIELD(CTL, PER_FRAME_CRC, 0, 1)
80 FIELD(CFRM_ISR0, READ_BROADCAST_ERROR, 21, 1)
[all …]
H A Dstm32l4x5_rcc_internals.h32 FIELD(CR, PLLSAI2RDY, 29, 1)
33 FIELD(CR, PLLSAI2ON, 28, 1)
34 FIELD(CR, PLLSAI1RDY, 27, 1)
35 FIELD(CR, PLLSAI1ON, 26, 1)
36 FIELD(CR, PLLRDY, 25, 1)
37 FIELD(CR, PLLON, 24, 1)
38 FIELD(CR, CSSON, 19, 1)
39 FIELD(CR, HSEBYP, 18, 1)
40 FIELD(CR, HSERDY, 17, 1)
41 FIELD(CR, HSEON, 16, 1)
[all …]
/openbmc/qemu/hw/intc/
H A Dxlnx-pmu-iomod-intc.c52 FIELD(GPO0, MAGIC_WORD_1, 24, 8)
53 FIELD(GPO0, MAGIC_WORD_2, 16, 8)
54 FIELD(GPO0, FT_INJECT_FAILURE, 13, 3)
55 FIELD(GPO0, DISABLE_RST_FTSM, 12, 1)
56 FIELD(GPO0, RST_FTSM, 11, 1)
57 FIELD(GPO0, CLR_FTSTS, 10, 1)
58 FIELD(GPO0, RST_ON_SLEEP, 9, 1)
59 FIELD(GPO0, DISABLE_TRACE_COMP, 8, 1)
60 FIELD(GPO0, PIT3_PRESCALE, 7, 1)
61 FIELD(GPO0, PIT2_PRESCALE, 5, 2)
[all …]
H A Dxlnx-zynqmp-ipi.c51 FIELD(IPI_TRIG, PL_3, 27, 1)
52 FIELD(IPI_TRIG, PL_2, 26, 1)
53 FIELD(IPI_TRIG, PL_1, 25, 1)
54 FIELD(IPI_TRIG, PL_0, 24, 1)
55 FIELD(IPI_TRIG, PMU_3, 19, 1)
56 FIELD(IPI_TRIG, PMU_2, 18, 1)
57 FIELD(IPI_TRIG, PMU_1, 17, 1)
58 FIELD(IPI_TRIG, PMU_0, 16, 1)
59 FIELD(IPI_TRIG, RPU_1, 9, 1)
60 FIELD(IPI_TRIG, RPU_0, 8, 1)
[all …]
H A Dgic_internal.h67 FIELD(GICH_HCR, EN, 0, 1)
68 FIELD(GICH_HCR, UIE, 1, 1)
69 FIELD(GICH_HCR, LRENPIE, 2, 1)
70 FIELD(GICH_HCR, NPIE, 3, 1)
71 FIELD(GICH_HCR, VGRP0EIE, 4, 1)
72 FIELD(GICH_HCR, VGRP0DIE, 5, 1)
73 FIELD(GICH_HCR, VGRP1EIE, 6, 1)
74 FIELD(GICH_HCR, VGRP1DIE, 7, 1)
75 FIELD(GICH_HCR, EOICount, 27, 5)
85 FIELD(GICH_VTR, ListRegs, 0, 6)
[all …]
/openbmc/qemu/hw/usb/
H A Dhcd-dwc3.c48 FIELD(GSBUSCFG0, DATRDREQINFO, 28, 4)
49 FIELD(GSBUSCFG0, DESRDREQINFO, 24, 4)
50 FIELD(GSBUSCFG0, DATWRREQINFO, 20, 4)
51 FIELD(GSBUSCFG0, DESWRREQINFO, 16, 4)
52 FIELD(GSBUSCFG0, RESERVED_15_12, 12, 4)
53 FIELD(GSBUSCFG0, DATBIGEND, 11, 1)
54 FIELD(GSBUSCFG0, DESBIGEND, 10, 1)
55 FIELD(GSBUSCFG0, RESERVED_9_8, 8, 2)
56 FIELD(GSBUSCFG0, INCR256BRSTENA, 7, 1)
57 FIELD(GSBUSCFG0, INCR128BRSTENA, 6, 1)
[all …]
/openbmc/qemu/hw/misc/
H A Dxlnx-versal-pmc-iou-slcr.c41 FIELD(MIO_PIN_0, L3_SEL, 7, 3)
42 FIELD(MIO_PIN_0, L2_SEL, 5, 2)
43 FIELD(MIO_PIN_0, L1_SEL, 3, 2)
44 FIELD(MIO_PIN_0, L0_SEL, 1, 2)
46 FIELD(MIO_PIN_1, L3_SEL, 7, 3)
47 FIELD(MIO_PIN_1, L2_SEL, 5, 2)
48 FIELD(MIO_PIN_1, L1_SEL, 3, 2)
49 FIELD(MIO_PIN_1, L0_SEL, 1, 2)
51 FIELD(MIO_PIN_2, L3_SEL, 7, 3)
52 FIELD(MIO_PIN_2, L2_SEL, 5, 2)
[all …]
/openbmc/qemu/hw/sd/
H A Dsdhci-internal.h86 FIELD(SDHC_PRNSTS, DAT_LVL, 20, 4);
87 FIELD(SDHC_PRNSTS, CMD_LVL, 24, 1);
110 FIELD(SDHC_PWRCON, BUS_VOLTAGE, 1, 3);
133 FIELD(SDHC_TIMEOUTCON, COUNTER, 0, 4);
190 FIELD(SDHC_ACMD12ERRSTS, TIMEOUT_ERR, 1, 1);
191 FIELD(SDHC_ACMD12ERRSTS, CRC_ERR, 2, 1);
192 FIELD(SDHC_ACMD12ERRSTS, INDEX_ERR, 4, 1);
196 FIELD(SDHC_HOSTCTL2, UHS_MODE_SEL, 0, 3);
197 FIELD(SDHC_HOSTCTL2, V18_ENA, 3, 1); /* UHS-I only */
198 FIELD(SDHC_HOSTCTL2, DRIVER_STRENGTH, 4, 2); /* UHS-I only */
[all …]
/openbmc/qemu/hw/char/
H A Dstm32l4x5_usart.c36 FIELD(CR1, M1, 28, 1) /* Word length (part 2, see M0) */
37 FIELD(CR1, EOBIE, 27, 1) /* End of Block interrupt enable */
38 FIELD(CR1, RTOIE, 26, 1) /* Receiver timeout interrupt enable */
39 FIELD(CR1, DEAT, 21, 5) /* Driver Enable assertion time */
40 FIELD(CR1, DEDT, 16, 5) /* Driver Enable de-assertion time */
41 FIELD(CR1, OVER8, 15, 1) /* Oversampling mode */
42 FIELD(CR1, CMIE, 14, 1) /* Character match interrupt enable */
43 FIELD(CR1, MME, 13, 1) /* Mute mode enable */
44 FIELD(CR1, M0, 12, 1) /* Word length (part 1, see M1) */
45 FIELD(CR1, WAKE, 11, 1) /* Receiver wakeup method */
[all …]
/openbmc/qemu/include/hw/rtc/
H A Dxlnx-zynqmp-rtc.h41 FIELD(CALIB_WRITE, FRACTION_EN, 20, 1)
42 FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4)
43 FIELD(CALIB_WRITE, MAX_TICK, 0, 16)
45 FIELD(CALIB_READ, FRACTION_EN, 20, 1)
46 FIELD(CALIB_READ, FRACTION_DATA, 16, 4)
47 FIELD(CALIB_READ, MAX_TICK, 0, 16)
50 FIELD(CURRENT_TICK, VALUE, 0, 16)
53 FIELD(RTC_INT_STATUS, ALARM, 1, 1)
54 FIELD(RTC_INT_STATUS, SECONDS, 0, 1)
56 FIELD(RTC_INT_MASK, ALARM, 1, 1)
[all …]
/openbmc/qemu/hw/i3c/
H A Daspeed_i3c.c24 FIELD(I3C1_REG1, I2C_MODE, 0, 1)
25 FIELD(I3C1_REG1, SLV_TEST_MODE, 1, 1)
26 FIELD(I3C1_REG1, ACT_MODE, 2, 2)
27 FIELD(I3C1_REG1, PENDING_INT, 4, 4)
28 FIELD(I3C1_REG1, SA, 8, 7)
29 FIELD(I3C1_REG1, SA_EN, 15, 1)
30 FIELD(I3C1_REG1, INST_ID, 16, 4)
33 FIELD(I3C2_REG1, I2C_MODE, 0, 1)
34 FIELD(I3C2_REG1, SLV_TEST_MODE, 1, 1)
35 FIELD(I3C2_REG1, ACT_MODE, 2, 2)
[all …]
H A Ddw-i3c.c31 FIELD(DEVICE_CTRL, I3C_BROADCAST_ADDR_INC, 0, 1)
32 FIELD(DEVICE_CTRL, I2C_SLAVE_PRESENT, 7, 1)
33 FIELD(DEVICE_CTRL, HOT_JOIN_ACK_NACK_CTRL, 8, 1)
34 FIELD(DEVICE_CTRL, IDLE_CNT_MULTIPLIER, 24, 2)
35 FIELD(DEVICE_CTRL, SLV_ADAPT_TO_I2C_I3C_MODE, 27, 1)
36 FIELD(DEVICE_CTRL, DMA_HANDSHAKE_EN, 28, 1)
37 FIELD(DEVICE_CTRL, I3C_ABORT, 29, 1)
38 FIELD(DEVICE_CTRL, I3C_RESUME, 30, 1)
39 FIELD(DEVICE_CTRL, I3C_EN, 31, 1)
41 FIELD(DEVICE_ADDR, STATIC_ADDR, 0, 7)
[all …]
/openbmc/qemu/target/rx/
H A Dcpu.h37 FIELD(PSW, C, 0, 1)
38 FIELD(PSW, Z, 1, 1)
39 FIELD(PSW, S, 2, 1)
40 FIELD(PSW, O, 3, 1)
41 FIELD(PSW, I, 16, 1)
42 FIELD(PSW, U, 17, 1)
43 FIELD(PSW, PM, 20, 1)
44 FIELD(PSW, IPL, 24, 4)
48 FIELD(FPSW, RM, 0, 2)
49 FIELD(FPSW, CV, 2, 1)
[all …]
/openbmc/qemu/hw/ssi/
H A Dxlnx-versal-ospi.c39 FIELD(CONFIG_REG, IDLE_FLD, 31, 1)
40 FIELD(CONFIG_REG, DUAL_BYTE_OPCODE_EN_FLD, 30, 1)
41 FIELD(CONFIG_REG, CRC_ENABLE_FLD, 29, 1)
42 FIELD(CONFIG_REG, CONFIG_RESV2_FLD, 26, 3)
43 FIELD(CONFIG_REG, PIPELINE_PHY_FLD, 25, 1)
44 FIELD(CONFIG_REG, ENABLE_DTR_PROTOCOL_FLD, 24, 1)
45 FIELD(CONFIG_REG, ENABLE_AHB_DECODER_FLD, 23, 1)
46 FIELD(CONFIG_REG, MSTR_BAUD_DIV_FLD, 19, 4)
47 FIELD(CONFIG_REG, ENTER_XIP_MODE_IMM_FLD, 18, 1)
48 FIELD(CONFIG_REG, ENTER_XIP_MODE_FLD, 17, 1)
[all …]
H A Dibex_spi_host.c38 FIELD(INTR_STATE, ERROR, 0, 1)
39 FIELD(INTR_STATE, SPI_EVENT, 1, 1)
41 FIELD(INTR_ENABLE, ERROR, 0, 1)
42 FIELD(INTR_ENABLE, SPI_EVENT, 1, 1)
44 FIELD(INTR_TEST, ERROR, 0, 1)
45 FIELD(INTR_TEST, SPI_EVENT, 1, 1)
47 FIELD(ALERT_TEST, FETAL_TEST, 0, 1)
49 FIELD(CONTROL, RX_WATERMARK, 0, 8)
50 FIELD(CONTROL, TX_WATERMARK, 1, 8)
51 FIELD(CONTROL, OUTPUT_EN, 29, 1)
[all …]
/openbmc/qemu/hw/net/can/
H A Dxlnx-zynqmp-can.c57 FIELD(SOFTWARE_RESET_REGISTER, CEN, 1, 1)
58 FIELD(SOFTWARE_RESET_REGISTER, SRST, 0, 1)
60 FIELD(MODE_SELECT_REGISTER, SNOOP, 2, 1)
61 FIELD(MODE_SELECT_REGISTER, LBACK, 1, 1)
62 FIELD(MODE_SELECT_REGISTER, SLEEP, 0, 1)
64 FIELD(ARBITRATION_PHASE_BAUD_RATE_PRESCALER_REGISTER, BRP, 0, 8)
66 FIELD(ARBITRATION_PHASE_BIT_TIMING_REGISTER, SJW, 7, 2)
67 FIELD(ARBITRATION_PHASE_BIT_TIMING_REGISTER, TS2, 4, 3)
68 FIELD(ARBITRATION_PHASE_BIT_TIMING_REGISTER, TS1, 0, 4)
70 FIELD(ERROR_COUNTER_REGISTER, REC, 8, 8)
[all …]
/openbmc/qemu/include/hw/cxl/
H A Dcxl_component.h44 FIELD(CXL_CAPABILITY_HEADER, ID, 0, 16)
45 FIELD(CXL_CAPABILITY_HEADER, VERSION, 16, 4)
46 FIELD(CXL_CAPABILITY_HEADER, CACHE_MEM_VERSION, 20, 4)
47 FIELD(CXL_CAPABILITY_HEADER, ARRAY_SIZE, 24, 8)
51 FIELD(CXL_##type##_CAPABILITY_HEADER, ID, 0, 16) \
52 FIELD(CXL_##type##_CAPABILITY_HEADER, VERSION, 16, 4) \
53 FIELD(CXL_##type##_CAPABILITY_HEADER, PTR, 20, 12)
100 FIELD(CXL_RAS_ERR_CAP_CTRL, FIRST_ERROR_POINTER, 0, 6)
101 FIELD(CXL_RAS_ERR_CAP_CTRL, MULTIPLE_HEADER_RECORDING_CAP, 9, 1)
102 FIELD(CXL_RAS_ERR_POISON_ENABLED, POISON_ENABLED, 13, 1)
[all …]
/openbmc/qemu/hw/arm/
H A Dsmmuv3-internal.h44 FIELD(IDR0, S2P, 0 , 1)
45 FIELD(IDR0, S1P, 1 , 1)
46 FIELD(IDR0, TTF, 2 , 2)
47 FIELD(IDR0, COHACC, 4 , 1)
48 FIELD(IDR0, BTM, 5 , 1)
49 FIELD(IDR0, HTTU, 6 , 2)
50 FIELD(IDR0, DORMHINT, 8 , 1)
51 FIELD(IDR0, HYP, 9 , 1)
52 FIELD(IDR0, ATS, 10, 1)
53 FIELD(IDR0, NS1ATS, 11, 1)
[all …]
/openbmc/qemu/include/hw/acpi/
H A Dtpm.h138 FIELD(CRB_LOC_STATE, tpmEstablished, 0, 1)
139 FIELD(CRB_LOC_STATE, locAssigned, 1, 1)
140 FIELD(CRB_LOC_STATE, activeLocality, 2, 3)
141 FIELD(CRB_LOC_STATE, reserved, 5, 2)
142 FIELD(CRB_LOC_STATE, tpmRegValidSts, 7, 1)
145 FIELD(CRB_LOC_STS, Granted, 0, 1)
146 FIELD(CRB_LOC_STS, beenSeized, 1, 1)
148 FIELD(CRB_INTF_ID, InterfaceType, 0, 4)
149 FIELD(CRB_INTF_ID, InterfaceVersion, 4, 4)
150 FIELD(CRB_INTF_ID, CapLocality, 8, 1)
[all …]
/openbmc/qemu/hw/dma/
H A Dxlnx-zdma.c44 FIELD(ZDMA_ERR_CTRL, APB_ERR_RES, 0, 1)
46 FIELD(ZDMA_CH_ISR, DMA_PAUSE, 11, 1)
47 FIELD(ZDMA_CH_ISR, DMA_DONE, 10, 1)
48 FIELD(ZDMA_CH_ISR, AXI_WR_DATA, 9, 1)
49 FIELD(ZDMA_CH_ISR, AXI_RD_DATA, 8, 1)
50 FIELD(ZDMA_CH_ISR, AXI_RD_DST_DSCR, 7, 1)
51 FIELD(ZDMA_CH_ISR, AXI_RD_SRC_DSCR, 6, 1)
52 FIELD(ZDMA_CH_ISR, IRQ_DST_ACCT_ERR, 5, 1)
53 FIELD(ZDMA_CH_ISR, IRQ_SRC_ACCT_ERR, 4, 1)
54 FIELD(ZDMA_CH_ISR, BYTE_CNT_OVRFL, 3, 1)
[all …]
H A Dxlnx-zynq-devcfg.c51 FIELD(CTRL, FORCE_RST, 31, 1) /* Not supported, wr ignored */
52 FIELD(CTRL, PCAP_PR, 27, 1) /* Forced to 0 on bad unlock */
53 FIELD(CTRL, PCAP_MODE, 26, 1)
54 FIELD(CTRL, MULTIBOOT_EN, 24, 1)
55 FIELD(CTRL, USER_MODE, 15, 1)
56 FIELD(CTRL, PCFG_AES_FUSE, 12, 1)
57 FIELD(CTRL, PCFG_AES_EN, 9, 3)
58 FIELD(CTRL, SEU_EN, 8, 1)
59 FIELD(CTRL, SEC_EN, 7, 1)
60 FIELD(CTRL, SPNIDEN, 6, 1)
[all …]
H A Dxlnx_csu_dma.c40 FIELD(ADDR, ADDR, 2, 30) /* wo */
42 FIELD(SIZE, SIZE, 2, 27)
43 FIELD(SIZE, LAST_WORD, 0, 1) /* rw, only exists in SRC */
45 FIELD(STATUS, DONE_CNT, 13, 3) /* wtc */
46 FIELD(STATUS, FIFO_LEVEL, 5, 8) /* ro */
47 FIELD(STATUS, OUTSTANDING, 1, 4) /* ro */
48 FIELD(STATUS, BUSY, 0, 1) /* ro */
50 FIELD(CTRL, FIFOTHRESH, 25, 7) /* rw, only exists in DST, reset 0x40 */
51 FIELD(CTRL, APB_ERR_RESP, 24, 1) /* rw */
52 FIELD(CTRL, ENDIANNESS, 23, 1) /* rw */
[all …]
/openbmc/qemu/tests/qtest/
H A Dremote-i3c-test.c
/openbmc/qemu/include/block/
H A Dufs.h59 FIELD(CAP, NUTRS, 0, 5)
60 FIELD(CAP, RTT, 8, 8)
61 FIELD(CAP, NUTMRS, 16, 3)
62 FIELD(CAP, AUTOH8, 23, 1)
63 FIELD(CAP, 64AS, 24, 1)
64 FIELD(CAP, OODDS, 25, 1)
65 FIELD(CAP, UICDMETMS, 26, 1)
66 FIELD(CAP, CS, 28, 1)
67 FIELD(CAP, LSDBS, 29, 1)
68 FIELD(CAP, MCQS, 30, 1)
[all …]

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