Searched refs:ETHSYS_TRGMII_MT7621_DDR_PLL (Results 1 – 2 of 2) sorted by relevance
538 #define ETHSYS_TRGMII_MT7621_DDR_PLL BIT(5) macro
473 ETHSYS_TRGMII_MT7621_DDR_PLL : 0; in mt7621_gmac0_rgmii_adjust()