Searched refs:EPCMPR0 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/ |
| H A D | fsl_epu.c | 46 {EPCMPR0 + EPCMPR_STRIDE * 0, 0},
47 {EPCMPR0 + EPCMPR_STRIDE * 1, 0},
48 {EPCMPR0 + EPCMPR_STRIDE * 2, 0x000000FF},
49 {EPCMPR0 + EPCMPR_STRIDE * 3, 0},
50 {EPCMPR0 + EPCMPR_STRIDE * 4, 0x000000FF},
51 {EPCMPR0 + EPCMPR_STRIDE * 5, 0x00000020},
52 {EPCMPR0 + EPCMPR_STRIDE * 6, 0},
53 {EPCMPR0 + EPCMPR_STRIDE * 7, 0},
54 {EPCMPR0 + EPCMPR_STRIDE * 8, 0x000000FF},
55 {EPCMPR0 + EPCMPR_STRIDE * 9, 0x000000FF},
[all …]
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| H A D | fsl_epu.h | 55 #define EPCMPR0 0x900 macro
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