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/openbmc/qemu/target/hexagon/
H A Dmacros.h31 #define GET_USR_FIELD(FIELD, DST) \ argument
32 tcg_gen_extract_tl(DST, hex_gpr[HEX_REG_USR], \
106 #define MEM_LOAD1s(DST, VA) \ argument
109 tcg_gen_qemu_ld_tl(DST, VA, ctx->mem_idx, MO_SB); \
111 #define MEM_LOAD1u(DST, VA) \ argument
114 tcg_gen_qemu_ld_tl(DST, VA, ctx->mem_idx, MO_UB); \
116 #define MEM_LOAD2s(DST, VA) \ argument
119 tcg_gen_qemu_ld_tl(DST, VA, ctx->mem_idx, MO_LE | MO_SW); \
121 #define MEM_LOAD2u(DST, VA) \ argument
124 tcg_gen_qemu_ld_tl(DST, VA, ctx->mem_idx, MO_LE | MO_UW); \
[all …]
/openbmc/qemu/scripts/
H A Dentitlement.sh11 DST="$1"
18 cp -pPf "$SRC" "$DST.tmp"
19 SRC="$DST.tmp"
32 mv -f "$SRC" "$DST"
/openbmc/u-boot/scripts/
H A Dobjdiff98 DST="`git rev-parse --short HEAD`"
101 DST="`git rev-parse --short $2`"
111 DSTD="$TMPD/$DST"
/openbmc/qemu/target/hexagon/imported/
H A Dmacros.def236 DST = __sum;
241 DST=0x7FFFFFFFFFFFFFFFLL; fSET_OVERFLOW();
244 DST=0x8000000000000000LL; fSET_OVERFLOW();
248 DST = __sum;
806 DST = fMIN(maxv,fMAX(SRC,minv));
1106 DST = fSFNANVAL();
1115 fCHECKSFNAN(DST,A);
1116 fCHECKSFNAN(DST,B);
1117 fCHECKSFNAN(DST,C);
1337 { DST = (size##SIZE##SIGN##_t)MEM_LOAD##SIZE(thread,EA,insn); },
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H A Dmpy.idef23 #define STD_SP_MODES(TAG,OPER,ATR,DST,ACCSEM,SEM,OSEM,SATSEM,RNDSEM)\
24 Q6INSN(M2_##TAG##_hh_s0, OPER"(Rs.H32,Rt.H32)"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM SEM( …
25 Q6INSN(M2_##TAG##_hh_s1, OPER"(Rs.H32,Rt.H32):<<1"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM fSCALE(…
26 Q6INSN(M2_##TAG##_hl_s0, OPER"(Rs.H32,Rt.L32)"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM SEM( …
27 Q6INSN(M2_##TAG##_hl_s1, OPER"(Rs.H32,Rt.L32):<<1"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM fSCALE(…
28 Q6INSN(M2_##TAG##_lh_s0, OPER"(Rs.L32,Rt.H32)"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM SEM( …
29 Q6INSN(M2_##TAG##_lh_s1, OPER"(Rs.L32,Rt.H32):<<1"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM fSCALE(…
30 Q6INSN(M2_##TAG##_ll_s0, OPER"(Rs.L32,Rt.L32)"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM SEM( …
31 Q6INSN(M2_##TAG##_ll_s1, OPER"(Rs.L32,Rt.L32):<<1"OSEM, ATR,"",{DST=SATSEM(RNDSEM(ACCSEM fSCALE(…
53 #define STD_USP_MODES(TAG,OPER,ATR,DST,ACCSEM,SEM,OSEM,SATSEM,RNDSEM)\
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H A Dalu.idef1129 #define CROUND(DST,SRC,SHIFT) \
1134 DST = SRC;\
1143 DST = fCAST16S_8S(tmp128);\
1149 DST = fCAST16S_8S(tmp128);\
/openbmc/openbmc/poky/meta/recipes-support/ca-certificates/ca-certificates/
H A D0003-update-ca-certificates-use-relative-symlinks-from-ET.patch64 + DST="$(echo ${CERT} | sed -e "s|^$SYSROOT||" -e "s|^/|$FSROOT|" )"
65 + if ! test -e "$PEM" || [ "$(readlink "$PEM")" != "${DST}" ]
68 + ln -sf "${DST}" "$PEM"
H A D0001-Revert-mozilla-certdata2pem.py-print-a-warning-for-e.patch25 * Blacklist expired root certificate "DST Root CA X3" (closes: #995432)
/openbmc/qemu/target/alpha/
H A Dhelper.c32 #define CONVERT_BIT(X, SRC, DST) \ argument
33 (SRC > DST ? (X) / (SRC / DST) & (DST) : ((X) & SRC) * (DST / SRC))
H A Dfpu_helper.c38 #define CONVERT_BIT(X, SRC, DST) \ argument
39 (SRC > DST ? (X) / (SRC / DST) & (DST) : ((X) & SRC) * (DST / SRC))
/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dmacros.def523 …mem_load_vector_oddva(thread, insn, EA&~(ALIGNMENT-1), EA, insn->slot, LEN, &DST.ub[0], LEN, fUSE_…
529 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST),
536 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST);
537 fVFOREACH(8,__i) if (!fGETQBIT(QVAL,__i)) DST.b[__i] = 0;
545 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST);
546 fVFOREACH(8,__i) if (fGETQBIT(QVAL,__i)) DST.b[__i] = 0;
556 …mem_load_vector_oddva(thread, insn, EA+size1, EA+fVECSIZE(), /* slot */ 1, size2, &DST.ub[size1], …
557 …mem_load_vector_oddva(thread, insn, EA, EA,/* slot */ 0, size1, &DST.ub[0], size1, fUSE_LOOKUP_ADD…
571 fLOADMMV_AL(EA,fVECSIZE(),fVECSIZE(),DST);
576 fLOADMMVU_AL(EA,fVECSIZE(),fVECSIZE(),DST);
/openbmc/qemu/target/sparc/
H A Dcpu.h362 #define CONVERT_BIT(X, SRC, DST) \ argument
363 (SRC > DST ? (X) / (SRC / DST) & (DST) : ((X) & SRC) * (DST / SRC))
/openbmc/qemu/target/hppa/
H A Dfpu_helper.c88 #define CONVERT_BIT(X, SRC, DST) \ argument
89 ((unsigned)(SRC) > (unsigned)(DST) \
90 ? (X) / ((SRC) / (DST)) & (DST) \
91 : ((X) & (SRC)) * ((DST) / (SRC)))
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-benchmark/tinymembench/tinymembench/
H A D0001-asm-Delete-.func-.endfunc-directives.patch32 DST .req x0
131 DST .req r0
294 stmia DST!, {r8-r11}
302 stmia DST!, {r8-r11}
/openbmc/u-boot/board/hisilicon/hikey/
H A DREADME159 INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689
165 INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
171 INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180
177 INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0
183 INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0
/openbmc/qemu/target/arm/
H A Dcpu.h3092 #define DP_TBFLAG_ANY(DST, WHICH, VAL) \ argument
3093 (DST.flags = FIELD_DP32(DST.flags, TBFLAG_ANY, WHICH, VAL))
3094 #define DP_TBFLAG_A64(DST, WHICH, VAL) \ argument
3095 (DST.flags2 = FIELD_DP64(DST.flags2, TBFLAG_A64, WHICH, VAL))
3096 #define DP_TBFLAG_A32(DST, WHICH, VAL) \ argument
3097 (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_A32, WHICH, VAL))
3098 #define DP_TBFLAG_M32(DST, WHICH, VAL) \ argument
3099 (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_M32, WHICH, VAL))
3100 #define DP_TBFLAG_AM32(DST, WHICH, VAL) \ argument
3101 (DST.flags2 = FIELD_DP32(DST.flags2, TBFLAG_AM32, WHICH, VAL))
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DDOC9 …DST) rules for the United States that expand DST as of March 2007. Since DOC software obtains time…
/openbmc/qemu/target/hexagon/mmvec/
H A Dmacros.h285 #define fLOADMMV(EA, DST) gen_vreg_load(ctx, DST##_off, EA, true) argument
288 #define fLOADMMVU(EA, DST) gen_vreg_load(ctx, DST##_off, EA, false) argument
/openbmc/openbmc/meta-openembedded/meta-oe/licenses/
H A DACE-TAO-CIAO63 2005," which established new daylight savings times (DST) rules for
64 the United States that expand DST as of March 2007. Since DOC software
66 users will not be affected by the new DST rules as long as they
/openbmc/qemu/target/hexagon/idef-parser/
H A Dmacros.h.inc40 #define fCLIP(DST, SRC, U) (DST = fMIN((1 << U) - 1, fMAX(SRC, -(1 << U))))
/openbmc/qemu/target/loongarch/
H A Dcpu-csr.h202 FIELD(CSR_DBG, DST, 0, 1)
H A Dcpu.c147 !(FIELD_EX64(env->CSR_DBG, CSR_DBG, DST))); in cpu_loongarch_hw_interrupts_enabled()
191 env->CSR_DBG = FIELD_DP64(env->CSR_DBG, CSR_DBG, DST, 1); in loongarch_cpu_do_interrupt()
195 if (FIELD_EX64(env->CSR_DBG, CSR_DBG, DST)) { in loongarch_cpu_do_interrupt()
/openbmc/qemu/target/loongarch/tcg/
H A Dtlb_helper.c91 if (!FIELD_EX64(env->CSR_DBG, CSR_DBG, DST)) { in raise_mmu_exception()
/openbmc/qemu/target/i386/tcg/
H A Demit.c.inc1305 /* Compute adjusted DST in T1, merging in SRC[RPL]. */
1308 /* Z flag set if DST[RPL] < SRC[RPL] */
1312 /* Place maximum RPL in DST */