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Searched refs:DSI_PX (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157.dtsi23 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
H A Dstm32mp157a-dk1-scmi.dts33 clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
H A Dstm32mp157c-dk2-scmi.dts39 clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
H A Dstm32mp157c-ed1-scmi.dts38 clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
H A Dstm32mp157c-ev1-scmi.dts39 clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Dstm32mp1-clks.h175 #define DSI_PX 164 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dstm32mp1-clks.h175 #define DSI_PX 164 macro
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dst,stm32-dsi.yaml94 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
/openbmc/u-boot/drivers/clk/
H A Dclk_stm32mp1.c525 STM32MP1_CLK_SET_CLR_F(RCC_MP_APB4ENSETR, 4, DSI_PX, _PLL4_Q),
1822 case DSI_PX: in stm32mp1_clk_set_rate()
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c.dtsi940 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
/openbmc/linux/drivers/clk/
H A Dclk-stm32mp1.c2042 MGATE_MP1(DSI_PX, "dsi_px", "pll4_q", CLK_SET_RATE_PARENT, G_DSI),