Home
last modified time | relevance | path

Searched refs:DSI (Results 1 – 25 of 220) sorted by relevance

123456789

/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dmipi-dsi-bus.txt1 MIPI DSI (Display Serial Interface) busses
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
39 DSI peripheral
72 Peripherals that support dual channel DSI
80 an input endpoint of the DSI peripheral.
87 - (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus
90 DSI host using of-graph bindings.
[all …]
H A Dbrcm,bcm2835-dsi0.yaml7 title: Broadcom VC4 (VideoCore4) DSI Controller
30 - description: The DSI PLL clock feeding the DSI analog PHY
31 - description: The DSI ESC clock
32 - description: The DSI pixel clock
43 # - description: The DSI byte clock for the PHY
44 # - description: The DSI DDR2 clock
45 # - description: The DSI DDR clock
H A Dtruly,nt35597.txt1 Truly model NT35597 DSI display driver
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
H A Ddsi-controller.yaml7 title: Common Properties for DSI Display Panels
13 This document defines device tree properties common to DSI, Display
22 Notice: this binding concerns DSI panels connected directly to a master
23 without any intermediate port graph to the panel. Each DSI master
37 another DSI host to drive the same peripheral. Hardware supporting
39 to be driven by the same clock. Only the DSI host instance
50 description: Panels connected to the DSI link
58 The virtual channel number of a DSI peripheral. Must be in the range
59 from 0 to 3, as DSI uses a 2-bit addressing scheme. Some DSI
H A Dst,stm32-dsi.yaml7 title: STMicroelectronics STM32 DSI host controller
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
29 - description: DSI bus clock
58 DSI input port node, connected to the ltdc rgb output port.
64 DSI output port node, connected to a panel or a bridge input port.
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,mmcc.yaml85 - description: DSI phy instance 1 dsi clock
86 - description: DSI phy instance 1 byte clock
87 - description: DSI phy instance 2 dsi clock
88 - description: DSI phy instance 2 byte clock
117 - description: DSI phy instance 0 dsi clock
118 - description: DSI phy instance 0 byte clock
145 - description: DSI phy instance 0 dsi clock
146 - description: DSI phy instance 0 byte clock
147 - description: DSI phy instance 1 dsi clock
184 - description: DSI phy instance 0 dsi clock
[all …]
H A Dqcom,dispcc-sc8280xp.yaml38 - description: DSI 0 PLL byte clock
39 - description: DSI 0 PLL DSI clock
40 - description: DSI 1 PLL byte clock
41 - description: DSI 1 PLL DSI clock
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dsi.yaml7 title: Renesas RZ/G2L MIPI DSI Encoder
36 - description: DSI Packet Receive interrupt
37 - description: DSI Fatal Error interrupt
38 - description: DSI D-PHY PPI interrupt
53 - description: DSI D-PHY PLL multiplied clock
54 - description: DSI D-PHY system clock
55 - description: DSI AXI bus clock
56 - description: DSI Register access clock
57 - description: DSI Video clock
58 - description: DSI D-PHY Escape mode transmit clock
[all …]
H A Dti,sn65dsi83.yaml7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
45 description: Video port for MIPI DSI Channel-A input
54 description: array of physical DSI data lane indexes.
65 description: Video port for MIPI DSI Channel-B input
74 description: array of physical DSI data lane indexes.
H A Dintel,keembay-dsi.yaml27 - description: MIPI DSI clock
28 - description: MIPI DSI econfig clock
29 - description: MIPI DSI config clock
43 description: MIPI DSI input port.
47 description: DSI output port.
H A Dchipone,icn6211.yaml7 title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge
13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone.
15 It has a flexible configuration of MIPI DSI signal input and
25 description: virtual channel number of a DSI peripheral
56 Video port for MIPI DSI input
65 description: array of physical DSI data lane indexes.
H A Dlontium,lt9211.yaml7 title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.
13 The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
14 or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
41 Primary MIPI DSI port-1 for MIPI input or
54 Primary MIPI DSI port-1 for MIPI output or
H A Dtoshiba,tc358762.yaml7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge
13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI.
22 description: virtual channel number of a DSI peripheral
37 Video port for MIPI DSI input
H A Dti,dlpc3433.yaml7 title: TI DLPC3433 MIPI DSI to DMD bridge
14 TI DLPC3433 is a MIPI DSI based display controller bridge
17 It has a flexible configuration of MIPI DSI and DPI signal
49 description: Video port for MIPI DSI input.
58 description: array of physical DSI data lane indexes.
H A Drenesas,dsi-csi2-tx.yaml7 title: Renesas R-Car MIPI DSI/CSI-2 Encoder
13 This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
14 R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up
29 - description: DSI (and CSI-2) functional clock
55 description: DSI/CSI-2 output port
/openbmc/linux/drivers/gpu/drm/bridge/
H A DKconfig92 tristate "Lontium LT8912B DSI/HDMI bridge"
108 tristate "Lontium LT9211 DSI/LVDS/DPI bridge"
121 tristate "Lontium LT9611 DSI/HDMI bridge"
135 tristate "Lontium LT9611UXC DSI/HDMI bridge"
222 MIPI DSI to eDP converter
280 tristate "TC358762 DSI/DPI bridge"
286 Toshiba TC358762 DSI/DPI bridge driver.
289 tristate "TC358764 DSI/LVDS bridge"
295 Toshiba TC358764 DSI/LVDS bridge driver.
310 tristate "Toshiba TC358768 MIPI DSI bridge"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dsharp,lq101r1sx01.yaml13 This panel requires a dual-channel DSI host to operate. It supports two modes:
17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
18 driven by the first link (DSI-LINK1), left or even, is considered the primary
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
22 Note that in video mode the DSI-LINK1 interface always provides the left/even
23 pixels and DSI-LINK2 always provides the right/odd pixels. In command mode it
47 phandle to the DSI peripheral on the secondary link. Note that the
48 presence of this property marks the containing node as DSI-LINK1
H A Dorisetech,otm8009a.yaml7 title: Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
14 a MIPI-DSI video interface. Its backlight is managed through the DSI link.
25 description: DSI virtual channel
H A Draspberrypi,7inch-touchscreen.yaml14 This DSI panel contains:
16 - TC358762 DSI->DPI bridge
17 - Atmel microcontroller on I2C for power sequencing the DSI bridge and
21 and this binding covers the DSI display parts but not its touch input.
/openbmc/linux/drivers/gpu/drm/msm/
H A DKconfig100 bool "Enable DSI support in MSM DRM driver"
106 Choose this option if you have a need for MIPI DSI connector
110 bool "Enable DSI 28nm PHY driver in MSM DRM"
114 Choose this option if the 28nm DSI PHY is used on the platform.
117 bool "Enable DSI 20nm PHY driver in MSM DRM"
121 Choose this option if the 20nm DSI PHY is used on the platform.
124 bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
136 Choose this option if DSI PHY on 8996 is used on the platform.
139 bool "Enable DSI 10nm PHY driver in MSM DRM (used by SDM845)"
143 Choose this option if DSI PHY on SDM845 is used on the platform.
[all …]
/openbmc/linux/drivers/gpu/drm/panel/
H A DKconfig77 45NA WUXGA PANEL DSI Video Mode panel
154 4-lane 800x1280 MIPI DSI panel.
382 tristate "Novatek NT35950 DSI panel"
403 tristate "Novatek NT36672A DSI panel"
497 (1080x1920) DSI panel.
506 720x1280 DSI video mode panel.
515 RB070D30 1024x600 DSI panel.
585 DSI.
603 S6E63M0 panel using DSI.
749 tristate "TDO TL070WSH30 DSI panel"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap5-dss.txt21 - DSS Submodules: RFBI, DSI, HDMI
59 DSI
66 - interrupts: the DSI interrupt line
68 - vdd-supply: power supply for DSI
73 - Video port for DSI output
74 - DSI controlled peripherals
76 DSI Endpoint required properties:
77 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
H A Dti,omap4-dss.txt21 - DSS Submodules: RFBI, VENC, DSI, HDMI
78 DSI
85 - interrupts: the DSI interrupt line
87 - vdd-supply: power supply for DSI
92 - Video port for DSI output
93 - DSI controlled peripherals
95 DSI Endpoint required properties:
96 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
/openbmc/linux/drivers/gpu/drm/bridge/cadence/
H A DKconfig3 tristate "Cadence DPI/DSI bridge"
11 Support Cadence DPI to DSI bridge. This is an internal
17 bool "J721E Cadence DSI wrapper support"
20 Support J721E Cadence DSI wrapper. The wrapper manages
21 the routing of the DSS DPI signal to the Cadence DSI.
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dmixel,mipi-dsi-phy.yaml7 title: Mixel DSI PHY for i.MX8
13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
15 electrical signals for DSI.
18 in either MIPI-DSI PHY mode or LVDS PHY mode.

123456789