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Searched refs:DRAMTMG3_TMRD (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/dram_timings/
H A Dddr2_v3s.c62 writel(DRAMTMG3_TMRW(tmrw) | DRAMTMG3_TMRD(tmrd) | DRAMTMG3_TMOD(tmod), in mctl_set_timing_params()
H A Dlpddr3_stock.c61 writel(DRAMTMG3_TMRW(tmrw) | DRAMTMG3_TMRD(tmrd) | DRAMTMG3_TMOD(tmod), in mctl_set_timing_params()
H A Dddr3_1333.c65 writel(DRAMTMG3_TMRW(tmrw) | DRAMTMG3_TMRD(tmrd) | DRAMTMG3_TMOD(tmod), in mctl_set_timing_params()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sunxi_dw.h169 #define DRAMTMG3_TMRD(x) ((x) << 12) macro