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Searched refs:DP_SEC_GSP5_ENABLE (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_stream_encoder.h349 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\
431 uint8_t DP_SEC_GSP5_ENABLE; member
563 uint32_t DP_SEC_GSP5_ENABLE; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dio_stream_encoder.h96 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_stream_encoder.h320 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\
436 type DP_SEC_GSP5_ENABLE;\
H A Ddcn10_stream_encoder.c768 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, info_frame->adaptive_sync.valid); in enc1_stream_encoder_update_dp_info_packets()
889 DP_SEC_GSP5_ENABLE, 0, in enc1_stream_encoder_stop_dp_info_packets()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dio_stream_encoder.h188 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\
H A Ddcn30_dio_stream_encoder.c500 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, info_frame->adaptive_sync.valid); in enc3_stream_encoder_update_dp_info_packets()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dio_stream_encoder.h175 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\