Searched refs:DPHY_TX_J721E_WIZ_PLL_CTRL (Results 1 – 1 of 1) sorted by relevance
66 #define DPHY_TX_J721E_WIZ_PLL_CTRL 0xF04 macro248 dphy->regs + DPHY_TX_J721E_WIZ_PLL_CTRL); in cdns_dphy_j721e_set_pll_cfg()253 readl_poll_timeout(dphy->regs + DPHY_TX_J721E_WIZ_PLL_CTRL, status, in cdns_dphy_j721e_set_pll_cfg()