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Searched refs:DOUT_SCLK_BUS1_PLL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos7-clk.h13 #define DOUT_SCLK_BUS1_PLL 3 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dexynos7420-clk.h16 #define DOUT_SCLK_BUS1_PLL 3 macro
/openbmc/u-boot/arch/arm/dts/
H A Dexynos7420.dtsi37 <&clock_topc DOUT_SCLK_BUS1_PLL>,
/openbmc/u-boot/drivers/clk/exynos/
H A Dclk-exynos7420.c76 case DOUT_SCLK_BUS1_PLL: in exynos7420_topc_get_rate()
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi176 <&clock_topc DOUT_SCLK_BUS1_PLL>,
190 <&clock_topc DOUT_SCLK_BUS1_PLL>,
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7.c128 DIV(DOUT_SCLK_BUS1_PLL, "dout_sclk_bus1_pll", "mout_topc_bus1_pll",