Searched refs:DISP_ENABLE (Results 1 – 5 of 5) sorted by relevance
192 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE; in emulate_monitor_status_change()503 vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE; in emulate_monitor_status_change()
215 plane->enabled = !!(val & DISP_ENABLE); in intel_vgpu_decode_primary_plane()
160 dspcntr = DISP_ENABLE; in i9xx_plane_ctl()683 ret = val & DISP_ENABLE; in i9xx_plane_get_hw_state()
7980 intel_de_read(dev_priv, DSPCNTR(PLANE_A)) & DISP_ENABLE); in i830_disable_pipe()7982 intel_de_read(dev_priv, DSPCNTR(PLANE_B)) & DISP_ENABLE); in i830_disable_pipe()7984 intel_de_read(dev_priv, DSPCNTR(PLANE_C)) & DISP_ENABLE); in i830_disable_pipe()
3105 #define DISP_ENABLE REG_BIT(31) macro