| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.h | 67 SRI(DIG_FE_CNTL, DIG, id), \
169 SE_SF(DIG_FE_CNTL, DIG_START, mask_sh),\
170 SE_SF(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, mask_sh),\
171 SE_SF(DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, mask_sh),\
204 SE_SF(DIG_FE_CNTL, DIG_SOURCE_SELECT, mask_sh)
300 SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
301 SE_SF(DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh),\
303 SE_SF(DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, mask_sh)
310 SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
311 SE_SF(DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh),\
[all …]
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| H A D | dce_stream_encoder.c | 518 } else if (enc110->regs->DIG_FE_CNTL) { in dce110_stream_encoder_set_stream_attribute_helper()
521 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 1); in dce110_stream_encoder_set_stream_attribute_helper()
524 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 0); in dce110_stream_encoder_set_stream_attribute_helper()
527 REG_UPDATE(DIG_FE_CNTL, TMDS_COLOR_FORMAT, 0); in dce110_stream_encoder_set_stream_attribute_helper()
562 } else if (enc110->regs->DIG_FE_CNTL) { in dce110_stream_encoder_hdmi_set_stream_attribute()
991 REG_UPDATE(DIG_FE_CNTL, DIG_START, 1); in dce110_stream_encoder_dp_unblank()
1491 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in setup_stereo_sync()
1492 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, !enable); in setup_stereo_sync()
1501 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in dig_connect_to_otg()
1510 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in dig_source_otg()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_stream_encoder.c | 471 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 1); in enc1_stream_encoder_set_stream_attribute_helper()
474 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 0); in enc1_stream_encoder_set_stream_attribute_helper()
477 REG_UPDATE(DIG_FE_CNTL, TMDS_COLOR_FORMAT, 0); in enc1_stream_encoder_set_stream_attribute_helper()
1007 REG_UPDATE(DIG_FE_CNTL, DIG_START, 1); in enc1_stream_encoder_dp_unblank()
1486 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, tg_inst); in enc1_setup_stereo_sync()
1487 REG_UPDATE(DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, !enable); in enc1_setup_stereo_sync()
1496 REG_UPDATE(DIG_FE_CNTL, DIG_SOURCE_SELECT, tg_inst); in enc1_dig_connect_to_otg()
1505 REG_GET(DIG_FE_CNTL, DIG_SOURCE_SELECT, &tg_inst); in enc1_dig_source_otg()
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| H A D | dcn10_stream_encoder.h | 54 SRI(DIG_FE_CNTL, DIG, id), \
129 uint32_t DIG_FE_CNTL; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_stream_encoder.c | 404 REG_UPDATE(DIG_FE_CNTL, in enc2_set_dynamic_metadata()
420 REG_UPDATE(DIG_FE_CNTL, in enc2_set_dynamic_metadata()
519 REG_UPDATE(DIG_FE_CNTL, DIG_START, 1); in enc2_stream_encoder_dp_unblank()
524 REG_UPDATE(DIG_FE_CNTL, DIG_START, 0); in enc2_stream_encoder_dp_unblank()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dio_stream_encoder.c | 563 REG_UPDATE(DIG_FE_CNTL, DIG_START, 1); in enc3_stream_encoder_dvi_set_stream_attribute()
567 REG_UPDATE(DIG_FE_CNTL, DIG_START, 0); in enc3_stream_encoder_dvi_set_stream_attribute()
609 REG_UPDATE(DIG_FE_CNTL, DIG_START, 1); in enc3_stream_encoder_hdmi_set_stream_attribute()
613 REG_UPDATE(DIG_FE_CNTL, DIG_START, 0); in enc3_stream_encoder_hdmi_set_stream_attribute()
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| H A D | dcn30_dio_stream_encoder.h | 50 SRI(DIG_FE_CNTL, DIG, id), \
110 SRI(DIG_FE_CNTL, DIG, id), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_dio_stream_encoder.c | 348 REG_WAIT(DIG_FE_CNTL, DIG_SYMCLK_FE_ON, 1, 10, 5000); in enc32_stream_encoder_dp_unblank()
435 REG_GET(DIG_FE_CNTL, DIG_SYMCLK_FE_ON, &is_symclk_on); in enc32_reset_fifo()
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| H A D | dcn32_resource.h | 259 SRI_ARR(AFMT_CNTL, DIG, id), SRI_ARR(DIG_FE_CNTL, DIG, id), \
301 SRI_ARR(DIG_FE_CNTL, DIG, id), SRI_ARR(DIG_CLOCK_PATTERN, DIG, id), \
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_dio_stream_encoder.h | 51 SRI(DIG_FE_CNTL, DIG, id), \
108 SRI(DIG_FE_CNTL, DIG, id), \
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| H A D | dcn314_dio_stream_encoder.c | 59 REG_GET(DIG_FE_CNTL, DIG_SYMCLK_FE_ON, &is_symclk_on); in enc314_reset_fifo()
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