Searched refs:DEFAULT_WRIOP_MDIO1_NAME (Results 1 – 7 of 7) sorted by relevance
56 mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; in board_eth_init()124 dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); in board_eth_init()132 dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); in board_eth_init()144 dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); in board_eth_init()
319 miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); in lx2160a_qds_mdio_init()470 mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; in board_eth_init()
38 mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; in board_eth_init()81 dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); in board_eth_init()
626 memac_mdio0_info->name = DEFAULT_WRIOP_MDIO1_NAME; in board_eth_init()631 ls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_RGMII1); in board_eth_init()632 ls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_RGMII2); in board_eth_init()633 ls1088a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT1); in board_eth_init()
39 mdio_info.name = DEFAULT_WRIOP_MDIO1_NAME; in board_eth_init()80 dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME); in board_eth_init()
860 memac_mdio0_info->name = DEFAULT_WRIOP_MDIO1_NAME; in board_eth_init()876 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT1); in board_eth_init()877 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT2); in board_eth_init()878 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT3); in board_eth_init()879 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT4); in board_eth_init()880 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT5); in board_eth_init()881 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT6); in board_eth_init()
11 #define DEFAULT_WRIOP_MDIO1_NAME "FSL_MDIO0" macro