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Searched refs:DDR_TWR (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c66 #define DDR_TWR(x) (((x) & DDR_TWR_M) << DDR_TWR_S) macro
81 DDR_CKE | DDR_TWR(13) | DDR_TRTW(14) | \
85 DDR_CKE | DDR_TWR(1) | DDR_TRTW(14) | \
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c63 #define DDR_TWR(x) ((x) << DDR_TWR_S) macro
78 DDR_CKE | DDR_TWR(6) | DDR_TRTW(14) | \
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_s10.h14 #define DDR_TWR 15 macro
/openbmc/u-boot/drivers/ddr/altera/
H A Dsdram_s10.c280 io48_value = (((DRAMTIMING0_CFG_TCL(dramtim0) + 2 + DDR_TWR + in sdram_mmr_init_full()