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Searched refs:DDR_CTRL_PRECHARGE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c16 #define DDR_CTRL_PRECHARGE BIT(3) macro
123 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
149 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
192 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
207 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c16 #define DDR_CTRL_PRECHARGE BIT(3) macro
254 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
274 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
336 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()
364 writel(DDR_CTRL_PRECHARGE, regs + AR71XX_DDR_REG_CONTROL); in ddr_init()