Searched refs:DDR3_RANK_CTRL_REG (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | mv_ddr_sys_env_lib.c | 97 return reg_read(DDR3_RANK_CTRL_REG) & in mv_ddr_sys_env_get_cs_ena_from_reg()
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| H A D | mv_ddr_regs.h | 266 #define DDR3_RANK_CTRL_REG 0x15e0 macro
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| H A D | ddr3_training.c | 456 DDR3_RANK_CTRL_REG, 0x27, MASK_ALL_BITS)); in hws_ddr3_tip_init_controller()
724 (dev_num, ACCESS_TYPE_UNICAST, if_id, DDR3_RANK_CTRL_REG, in ddr3_tip_rev2_rank_control()
757 (dev_num, ACCESS_TYPE_UNICAST, if_id, DDR3_RANK_CTRL_REG, in ddr3_tip_rev3_rank_control()
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