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Searched refs:DDR3_PLL (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dclock-k2e.h25 #define DDR3_PLL_200 {DDR3_PLL, 4, 1, 2}
26 #define DDR3_PLL_400 {DDR3_PLL, 16, 1, 4}
27 #define DDR3_PLL_800 {DDR3_PLL, 16, 1, 2}
28 #define DDR3_PLL_333 {DDR3_PLL, 20, 1, 6}
H A Dclock-k2l.h35 #define DDR3_PLL_200 {DDR3_PLL, 4, 1, 2}
36 #define DDR3_PLL_400 {DDR3_PLL, 16, 1, 4}
37 #define DDR3_PLL_800 {DDR3_PLL, 16, 1, 2}
38 #define DDR3_PLL_333 {DDR3_PLL, 20, 1, 6}
H A Dclock.h31 #define DDR3_PLL DDR3A_PLL macro
/openbmc/u-boot/arch/arm/mach-keystone/
H A Dcmd_clock.c40 cmd_pll_data.pll = DDR3_PLL; in do_pll_cmd()
/openbmc/u-boot/board/ti/ks2_evm/
H A Dboard_k2g.c196 case DDR3_PLL: in get_pll_init_data()