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Searched refs:DDR2_MODE_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dddr.c99 #define DDR2_MODE_VAL 0xa33 macro
156 writel(DDR2_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c185 #define DDR2_MODE_VAL 0x43 macro
374 writel(DDR2_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()