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Searched refs:DCR (Results 1 – 24 of 24) sorted by relevance

/openbmc/linux/drivers/rtc/
H A Drtc-imxdi.c43 #define DCR 0x10 /* Control Reg */ macro
251 dcr = readl(imxdi->ioaddr + DCR); in di_handle_failure_state()
290 di_write_busy_wait(imxdi, DCR_TDCSL, DCR); in di_handle_invalid_state()
301 dcr = readl(imxdi->ioaddr + DCR); in di_handle_invalid_state()
329 di_write_busy_wait(imxdi, dcr | DCR_TCE, DCR); in di_handle_invalid_state()
348 dcr = __raw_readl(imxdi->ioaddr + DCR); in di_handle_invalid_and_failure_state()
561 dcr = readl(imxdi->ioaddr + DCR); in dryice_rtc_set_time()
586 return di_write_wait(imxdi, readl(imxdi->ioaddr + DCR) | DCR_TCE, DCR); in dryice_rtc_set_time()
/openbmc/linux/drivers/net/wan/
H A Dhd64570.h142 #define DCR 0x15 /* DMA Command */ macro
143 #define DCR_RX(node) (DCR + (node ? DMAC1RX_OFFSET : DMAC0RX_OFFSET))
144 #define DCR_TX(node) (DCR + (node ? DMAC1TX_OFFSET : DMAC0TX_OFFSET))
/openbmc/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt17 - dcr-reg : <DCR registers range>
36 - dcr-reg : <DCR registers range>
83 - dcr-reg : <DCR registers range>
H A Dcpm.txt6 - dcr-reg : < DCR register range >
/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7706.h31 #define DCR 0xffffff6a macro
/openbmc/linux/drivers/watchdog/
H A Die6xx_wdt.c37 #define DCR 0x14 macro
192 inl(ie6xx_wdt_data.sch_wdtba + DCR)); in ie6xx_wdt_show()
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-i3c60 DCR stands for Device Characteristics Register and express the
63 This entry describes the DCR of the master controller driving
118 DCR stands for Device Characteristics Register and express the
/openbmc/u-boot/doc/device-tree-bindings/memory-controllers/
H A Dst,stm32mp1-ddr.txt110 DCR
259 0x0000000B /*DCR*/
/openbmc/linux/arch/powerpc/boot/dts/
H A Darches.dts116 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
117 0x030 0x008>; /* L2 cache DCR's */
H A Dtaishan.dts111 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
112 0x030 0x008>; /* L2 cache DCR's */
H A Dcanyonlands.dts119 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
120 0x030 0x008>; /* L2 cache DCR's */
H A Dglacier.dts112 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
113 0x030 0x008>; /* L2 cache DCR's */
/openbmc/linux/drivers/acpi/nfit/
H A Dnfit.h279 DCR, enumerator
/openbmc/linux/Documentation/trace/
H A Dkprobes.rst617 [<- DCR ->]
625 DCR: Detoured Code Region
627 The instructions in DCR are copied to the out-of-line buffer
628 of the kprobe, because the bytes in DCR are replaced by
631 a) The instructions in DCR must be relocatable.
632 b) The instructions in DCR must not include a call instruction.
634 d) DCR must not straddle the border between functions.
/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dcmd_ddrphy.c246 REG_DUMP(DCR); in reg_dump()
H A Dcmd_ddrmphy.c272 REG_DUMP(DCR); in reg_dump()
/openbmc/qemu/pc-bios/
H A Dcanyonlands.dts119 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
120 0x030 0x008>; /* L2 cache DCR's */
/openbmc/qemu/hw/i3c/
H A Daspeed_i3c.c273 FIELD(SLV_CHAR_CTRL, DCR, 8, 8)
321 FIELD(DEVICE_CHARACTERISTIC_TABLE_LOC_SECONDARY, DCR, 8, 8)
327 FIELD(DEVICE_CHARACTERISTIC_TABLE_LOC3, DCR, 0, 8)
1522 DEVICE_CHARACTERISTIC_TABLE_LOC3, DCR, in aspeed_i3c_device_update_char_table()
/openbmc/linux/include/trace/events/
H A Dkvm.h16 ERSN(TPR_ACCESS), ERSN(S390_SIEIC), ERSN(S390_RESET), ERSN(DCR),\
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dibm,emac.txt181 - dcr-reg : < DCR registers range >
/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h334 #define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */ macro
/openbmc/linux/Documentation/driver-api/i3c/
H A Dprotocol.rst72 * DCR: Device Characteristic Register. This 8-bit register describes the
/openbmc/linux/Documentation/driver-api/nvdimm/
H A Dnvdimm.rst70 DCR:
/openbmc/linux/tools/testing/selftests/kvm/lib/
H A Dkvm_util.c1866 KVM_EXIT_STRING(DCR),