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Searched refs:DCLK_LCDC (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c437 case DCLK_LCDC: in rk3128_vop_set_clk()
470 case DCLK_LCDC: in rk3128_vop_get_rate()
496 case DCLK_LCDC: in rk3128_clk_get_rate()
514 case DCLK_LCDC: in rk3128_clk_set_rate()
H A Dclk_rk3328.c614 case DCLK_LCDC: in rk3328_clk_set_rate()
735 case DCLK_LCDC: in rk3328_clk_set_parent()
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3128-cru.h50 #define DCLK_LCDC 190 macro
H A Drk3036-cru.h50 #define DCLK_LCDC 190 macro
H A Drk3328-cru.h93 #define DCLK_LCDC 180 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3328-cru.h94 #define DCLK_LCDC 120 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3328.c598 MUX(DCLK_LCDC, "dclk_lcdc", mux_dclk_lcdc_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi697 clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>;
799 <&cru DCLK_LCDC>, <&cru SCLK_PDM>,
/openbmc/u-boot/arch/arm/dts/
H A Drk3328.dtsi367 <&cru DCLK_LCDC>, <&cru SCLK_PDM>,